Front-end process modeling in silicon
Departamento de Electrónica, E.T.S.I. de Telecomunicación, Universidad de Valladolid, 47011 Valladolid, Spain
Corresponding author: a firstname.lastname@example.org
Revised: 25 September 2009
Published online: 7 November 2009
Front-end processing mostly deals with technologies associated to junction formation in semiconductor devices. Ion implantation and thermal anneal models are key to predict active dopant placement and activation. We review the main models involved in process simulation, including ion implantation, evolution of point and extended defects, amorphization and regrowth mechanisms, and dopant-defect interactions. Hierarchical simulation schemes, going from fundamental calculations to simplified models, are emphasized in this Colloquium. Although continuum modeling is the mainstream in the semiconductor industry, atomistic techniques are starting to play an important role in process simulation for devices with nanometer size features. We illustrate in some examples the use of atomistic modeling techniques to gain insight and provide clues for process optimization.
PACS: 02.70.-c – Computational techniques; simulations / 61.72.Cc – Kinetics of defect formation and annealing / 61.72.J- – Point defects and defect clusters / 61.72.uf – Ge and Si
© EDP Sciences, Società Italiana di Fisica, Springer-Verlag, 2009